Stochastic analysis of interconnect performance in the presence of process variations
Identifieur interne : 000375 ( PascalFrancis/Corpus ); précédent : 000374; suivant : 000376Stochastic analysis of interconnect performance in the presence of process variations
Auteurs : Janet Wang ; Praveen Ghanta ; Sarma VrudhulaSource :
Descripteurs français
- Pascal (Inist)
- Conception assistée, Conception circuit, Processus stochastique, Analyse stochastique, Evaluation performance, Système temporisé, Effet retard, Appel procédure, Analyse statistique, Modélisation, Méthode stochastique, Approche probabiliste, Espace Hilbert, Polynôme orthogonal, Méthode Galerkin, Variable aléatoire, Méthode Monte Carlo, Méthode perturbation.
English descriptors
- KwdEn :
- Circuit design, Computer aided design, Delay effect, Galerkin method, Hilbert space, Modeling, Monte Carlo method, Orthogonal polynomial, Performance evaluation, Perturbation method, Probabilistic approach, Procedure call, Random variable, Statistical analysis, Stochastic analysis, Stochastic method, Stochastic process, Timed system.
Abstract
Deformations in interconnect due to process variations can lead to significant performance degradation in deep sub-micron circuits. Timing analyzers attempt to capture the effects of variation on delay with simplified models. The timing verification of RC or RLC networks requires the substitution of such simplified models with spatial stochastic processes that capture the random nature of process variations. The present work proposes a new and viable method to compute the stochastic response of interconnects. The technique models the stochastic response in an infinite dimensional Hilbert space in terms of orthogonal polynomial expansions. A finite representation is obtained by using the Galerkin approach of minimizing the Hilbert space norm of the residual error. The key advance of the proposed method is that it provides a functional representation of the response of the system in terms of the random variables that represent the process variations. The proposed algorithm has been implemented in a procedure called OPERA. Results from OPERA simulations on commercial design test cases match well with those from the classical Monte Carlo SPICE simulations and from perturbation methods. Additionally OPERA shows good computational efficiency: speedup factor of 60 has been observed over Monte Carlo SPICE simulations.
Notice en format standard (ISO 2709)
Pour connaître la documentation sur le format Inist Standard.
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Format Inist (serveur)
NO : | PASCAL 06-0156613 INIST |
---|---|
ET : | Stochastic analysis of interconnect performance in the presence of process variations |
AU : | WANG (Janet); GHANTA (Praveen); VRUDHULA (Sarma) |
AF : | ECE Dept., Univ. of Arizona/Tucson, Arizona/Etats-Unis (1 aut., 2 aut., 3 aut.) |
DT : | Congrès; Niveau analytique |
SO : | IEEE/ACM International Conference on Computer-Aided Design/2004-11-07/San Jose CA USA; Etats-Unis; Piscataway, N.J., New-York, N.Y.: IEEE; Da. 2004; vol2, 880-886; ISBN 0-7803-8702-3 |
LA : | Anglais |
EA : | Deformations in interconnect due to process variations can lead to significant performance degradation in deep sub-micron circuits. Timing analyzers attempt to capture the effects of variation on delay with simplified models. The timing verification of RC or RLC networks requires the substitution of such simplified models with spatial stochastic processes that capture the random nature of process variations. The present work proposes a new and viable method to compute the stochastic response of interconnects. The technique models the stochastic response in an infinite dimensional Hilbert space in terms of orthogonal polynomial expansions. A finite representation is obtained by using the Galerkin approach of minimizing the Hilbert space norm of the residual error. The key advance of the proposed method is that it provides a functional representation of the response of the system in terms of the random variables that represent the process variations. The proposed algorithm has been implemented in a procedure called OPERA. Results from OPERA simulations on commercial design test cases match well with those from the classical Monte Carlo SPICE simulations and from perturbation methods. Additionally OPERA shows good computational efficiency: speedup factor of 60 has been observed over Monte Carlo SPICE simulations. |
CC : | 001D02B11; 001D03F06B |
FD : | Conception assistée; Conception circuit; Processus stochastique; Analyse stochastique; Evaluation performance; Système temporisé; Effet retard; Appel procédure; Analyse statistique; Modélisation; Méthode stochastique; Approche probabiliste; Espace Hilbert; Polynôme orthogonal; Méthode Galerkin; Variable aléatoire; Méthode Monte Carlo; Méthode perturbation |
ED : | Computer aided design; Circuit design; Stochastic process; Stochastic analysis; Performance evaluation; Timed system; Delay effect; Procedure call; Statistical analysis; Modeling; Stochastic method; Probabilistic approach; Hilbert space; Orthogonal polynomial; Galerkin method; Random variable; Monte Carlo method; Perturbation method |
SD : | Concepción asistida; Diseño circuito; Proceso estocástico; Análisis estocástico; Evaluación prestación; Sistema temporizado; Efecto retardo; Llamada procedimiento; Análisis estadístico; Modelización; Método estocástico; Enfoque probabilista; Espacio Hilbert; Polinomio ortogonal; Método Galerkin; Variable aléatoria; Método Monte Carlo; Método perturbación |
LO : | INIST-Y 38705.354000138704991270 |
ID : | 06-0156613 |
Links to Exploration step
Pascal:06-0156613Le document en format XML
<record><TEI><teiHeader><fileDesc><titleStmt><title xml:lang="en" level="a">Stochastic analysis of interconnect performance in the presence of process variations</title>
<author><name sortKey="Wang, Janet" sort="Wang, Janet" uniqKey="Wang J" first="Janet" last="Wang">Janet Wang</name>
<affiliation><inist:fA14 i1="01"><s1>ECE Dept., Univ. of Arizona</s1>
<s2>Tucson, Arizona</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</inist:fA14>
</affiliation>
</author>
<author><name sortKey="Ghanta, Praveen" sort="Ghanta, Praveen" uniqKey="Ghanta P" first="Praveen" last="Ghanta">Praveen Ghanta</name>
<affiliation><inist:fA14 i1="01"><s1>ECE Dept., Univ. of Arizona</s1>
<s2>Tucson, Arizona</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</inist:fA14>
</affiliation>
</author>
<author><name sortKey="Vrudhula, Sarma" sort="Vrudhula, Sarma" uniqKey="Vrudhula S" first="Sarma" last="Vrudhula">Sarma Vrudhula</name>
<affiliation><inist:fA14 i1="01"><s1>ECE Dept., Univ. of Arizona</s1>
<s2>Tucson, Arizona</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</inist:fA14>
</affiliation>
</author>
</titleStmt>
<publicationStmt><idno type="wicri:source">INIST</idno>
<idno type="inist">06-0156613</idno>
<date when="2004">2004</date>
<idno type="stanalyst">PASCAL 06-0156613 INIST</idno>
<idno type="RBID">Pascal:06-0156613</idno>
<idno type="wicri:Area/PascalFrancis/Corpus">000375</idno>
</publicationStmt>
<sourceDesc><biblStruct><analytic><title xml:lang="en" level="a">Stochastic analysis of interconnect performance in the presence of process variations</title>
<author><name sortKey="Wang, Janet" sort="Wang, Janet" uniqKey="Wang J" first="Janet" last="Wang">Janet Wang</name>
<affiliation><inist:fA14 i1="01"><s1>ECE Dept., Univ. of Arizona</s1>
<s2>Tucson, Arizona</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</inist:fA14>
</affiliation>
</author>
<author><name sortKey="Ghanta, Praveen" sort="Ghanta, Praveen" uniqKey="Ghanta P" first="Praveen" last="Ghanta">Praveen Ghanta</name>
<affiliation><inist:fA14 i1="01"><s1>ECE Dept., Univ. of Arizona</s1>
<s2>Tucson, Arizona</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</inist:fA14>
</affiliation>
</author>
<author><name sortKey="Vrudhula, Sarma" sort="Vrudhula, Sarma" uniqKey="Vrudhula S" first="Sarma" last="Vrudhula">Sarma Vrudhula</name>
<affiliation><inist:fA14 i1="01"><s1>ECE Dept., Univ. of Arizona</s1>
<s2>Tucson, Arizona</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</inist:fA14>
</affiliation>
</author>
</analytic>
</biblStruct>
</sourceDesc>
</fileDesc>
<profileDesc><textClass><keywords scheme="KwdEn" xml:lang="en"><term>Circuit design</term>
<term>Computer aided design</term>
<term>Delay effect</term>
<term>Galerkin method</term>
<term>Hilbert space</term>
<term>Modeling</term>
<term>Monte Carlo method</term>
<term>Orthogonal polynomial</term>
<term>Performance evaluation</term>
<term>Perturbation method</term>
<term>Probabilistic approach</term>
<term>Procedure call</term>
<term>Random variable</term>
<term>Statistical analysis</term>
<term>Stochastic analysis</term>
<term>Stochastic method</term>
<term>Stochastic process</term>
<term>Timed system</term>
</keywords>
<keywords scheme="Pascal" xml:lang="fr"><term>Conception assistée</term>
<term>Conception circuit</term>
<term>Processus stochastique</term>
<term>Analyse stochastique</term>
<term>Evaluation performance</term>
<term>Système temporisé</term>
<term>Effet retard</term>
<term>Appel procédure</term>
<term>Analyse statistique</term>
<term>Modélisation</term>
<term>Méthode stochastique</term>
<term>Approche probabiliste</term>
<term>Espace Hilbert</term>
<term>Polynôme orthogonal</term>
<term>Méthode Galerkin</term>
<term>Variable aléatoire</term>
<term>Méthode Monte Carlo</term>
<term>Méthode perturbation</term>
</keywords>
</textClass>
</profileDesc>
</teiHeader>
<front><div type="abstract" xml:lang="en">Deformations in interconnect due to process variations can lead to significant performance degradation in deep sub-micron circuits. Timing analyzers attempt to capture the effects of variation on delay with simplified models. The timing verification of RC or RLC networks requires the substitution of such simplified models with spatial stochastic processes that capture the random nature of process variations. The present work proposes a new and viable method to compute the stochastic response of interconnects. The technique models the stochastic response in an infinite dimensional Hilbert space in terms of orthogonal polynomial expansions. A finite representation is obtained by using the Galerkin approach of minimizing the Hilbert space norm of the residual error. The key advance of the proposed method is that it provides a functional representation of the response of the system in terms of the random variables that represent the process variations. The proposed algorithm has been implemented in a procedure called OPERA. Results from OPERA simulations on commercial design test cases match well with those from the classical Monte Carlo SPICE simulations and from perturbation methods. Additionally OPERA shows good computational efficiency: speedup factor of 60 has been observed over Monte Carlo SPICE simulations.</div>
</front>
</TEI>
<inist><standard h6="B"><pA><fA08 i1="01" i2="1" l="ENG"><s1>Stochastic analysis of interconnect performance in the presence of process variations</s1>
</fA08>
<fA09 i1="01" i2="1" l="ENG"><s1>ICCAD-2004 : International Conference on Computer Aided Design : November 7-11, 2004, DoubleTree Hotel, San Jose, CA</s1>
</fA09>
<fA11 i1="01" i2="1"><s1>WANG (Janet)</s1>
</fA11>
<fA11 i1="02" i2="1"><s1>GHANTA (Praveen)</s1>
</fA11>
<fA11 i1="03" i2="1"><s1>VRUDHULA (Sarma)</s1>
</fA11>
<fA14 i1="01"><s1>ECE Dept., Univ. of Arizona</s1>
<s2>Tucson, Arizona</s2>
<s3>USA</s3>
<sZ>1 aut.</sZ>
<sZ>2 aut.</sZ>
<sZ>3 aut.</sZ>
</fA14>
<fA18 i1="01" i2="1"><s1>IEEE Circuits and Systems Society</s1>
<s3>USA</s3>
<s9>org-cong.</s9>
</fA18>
<fA20><s2>vol2, 880-886</s2>
</fA20>
<fA21><s1>2004</s1>
</fA21>
<fA23 i1="01"><s0>ENG</s0>
</fA23>
<fA25 i1="01"><s1>IEEE</s1>
<s2>Piscataway, N.J.</s2>
</fA25>
<fA25 i1="02"><s1>ACM</s1>
<s2>New-York, N.Y.</s2>
</fA25>
<fA26 i1="01"><s0>0-7803-8702-3</s0>
</fA26>
<fA30 i1="01" i2="1" l="ENG"><s1>IEEE/ACM International Conference on Computer-Aided Design</s1>
<s3>San Jose CA USA</s3>
<s4>2004-11-07</s4>
</fA30>
<fA43 i1="01"><s1>INIST</s1>
<s2>Y 38705</s2>
<s5>354000138704991270</s5>
</fA43>
<fA44><s0>0000</s0>
<s1>© 2006 INIST-CNRS. All rights reserved.</s1>
</fA44>
<fA45><s0>28 ref.</s0>
</fA45>
<fA47 i1="01" i2="1"><s0>06-0156613</s0>
</fA47>
<fA60><s1>C</s1>
</fA60>
<fA61><s0>A</s0>
</fA61>
<fA66 i1="01"><s0>USA</s0>
</fA66>
<fC01 i1="01" l="ENG"><s0>Deformations in interconnect due to process variations can lead to significant performance degradation in deep sub-micron circuits. Timing analyzers attempt to capture the effects of variation on delay with simplified models. The timing verification of RC or RLC networks requires the substitution of such simplified models with spatial stochastic processes that capture the random nature of process variations. The present work proposes a new and viable method to compute the stochastic response of interconnects. The technique models the stochastic response in an infinite dimensional Hilbert space in terms of orthogonal polynomial expansions. A finite representation is obtained by using the Galerkin approach of minimizing the Hilbert space norm of the residual error. The key advance of the proposed method is that it provides a functional representation of the response of the system in terms of the random variables that represent the process variations. The proposed algorithm has been implemented in a procedure called OPERA. Results from OPERA simulations on commercial design test cases match well with those from the classical Monte Carlo SPICE simulations and from perturbation methods. Additionally OPERA shows good computational efficiency: speedup factor of 60 has been observed over Monte Carlo SPICE simulations.</s0>
</fC01>
<fC02 i1="01" i2="X"><s0>001D02B11</s0>
</fC02>
<fC02 i1="02" i2="X"><s0>001D03F06B</s0>
</fC02>
<fC03 i1="01" i2="X" l="FRE"><s0>Conception assistée</s0>
<s5>01</s5>
</fC03>
<fC03 i1="01" i2="X" l="ENG"><s0>Computer aided design</s0>
<s5>01</s5>
</fC03>
<fC03 i1="01" i2="X" l="SPA"><s0>Concepción asistida</s0>
<s5>01</s5>
</fC03>
<fC03 i1="02" i2="X" l="FRE"><s0>Conception circuit</s0>
<s5>02</s5>
</fC03>
<fC03 i1="02" i2="X" l="ENG"><s0>Circuit design</s0>
<s5>02</s5>
</fC03>
<fC03 i1="02" i2="X" l="SPA"><s0>Diseño circuito</s0>
<s5>02</s5>
</fC03>
<fC03 i1="03" i2="X" l="FRE"><s0>Processus stochastique</s0>
<s5>06</s5>
</fC03>
<fC03 i1="03" i2="X" l="ENG"><s0>Stochastic process</s0>
<s5>06</s5>
</fC03>
<fC03 i1="03" i2="X" l="SPA"><s0>Proceso estocástico</s0>
<s5>06</s5>
</fC03>
<fC03 i1="04" i2="X" l="FRE"><s0>Analyse stochastique</s0>
<s5>18</s5>
</fC03>
<fC03 i1="04" i2="X" l="ENG"><s0>Stochastic analysis</s0>
<s5>18</s5>
</fC03>
<fC03 i1="04" i2="X" l="SPA"><s0>Análisis estocástico</s0>
<s5>18</s5>
</fC03>
<fC03 i1="05" i2="X" l="FRE"><s0>Evaluation performance</s0>
<s5>19</s5>
</fC03>
<fC03 i1="05" i2="X" l="ENG"><s0>Performance evaluation</s0>
<s5>19</s5>
</fC03>
<fC03 i1="05" i2="X" l="SPA"><s0>Evaluación prestación</s0>
<s5>19</s5>
</fC03>
<fC03 i1="06" i2="X" l="FRE"><s0>Système temporisé</s0>
<s5>20</s5>
</fC03>
<fC03 i1="06" i2="X" l="ENG"><s0>Timed system</s0>
<s5>20</s5>
</fC03>
<fC03 i1="06" i2="X" l="SPA"><s0>Sistema temporizado</s0>
<s5>20</s5>
</fC03>
<fC03 i1="07" i2="X" l="FRE"><s0>Effet retard</s0>
<s5>21</s5>
</fC03>
<fC03 i1="07" i2="X" l="ENG"><s0>Delay effect</s0>
<s5>21</s5>
</fC03>
<fC03 i1="07" i2="X" l="SPA"><s0>Efecto retardo</s0>
<s5>21</s5>
</fC03>
<fC03 i1="08" i2="X" l="FRE"><s0>Appel procédure</s0>
<s5>22</s5>
</fC03>
<fC03 i1="08" i2="X" l="ENG"><s0>Procedure call</s0>
<s5>22</s5>
</fC03>
<fC03 i1="08" i2="X" l="SPA"><s0>Llamada procedimiento</s0>
<s5>22</s5>
</fC03>
<fC03 i1="09" i2="X" l="FRE"><s0>Analyse statistique</s0>
<s5>23</s5>
</fC03>
<fC03 i1="09" i2="X" l="ENG"><s0>Statistical analysis</s0>
<s5>23</s5>
</fC03>
<fC03 i1="09" i2="X" l="SPA"><s0>Análisis estadístico</s0>
<s5>23</s5>
</fC03>
<fC03 i1="10" i2="X" l="FRE"><s0>Modélisation</s0>
<s5>24</s5>
</fC03>
<fC03 i1="10" i2="X" l="ENG"><s0>Modeling</s0>
<s5>24</s5>
</fC03>
<fC03 i1="10" i2="X" l="SPA"><s0>Modelización</s0>
<s5>24</s5>
</fC03>
<fC03 i1="11" i2="X" l="FRE"><s0>Méthode stochastique</s0>
<s5>25</s5>
</fC03>
<fC03 i1="11" i2="X" l="ENG"><s0>Stochastic method</s0>
<s5>25</s5>
</fC03>
<fC03 i1="11" i2="X" l="SPA"><s0>Método estocástico</s0>
<s5>25</s5>
</fC03>
<fC03 i1="12" i2="X" l="FRE"><s0>Approche probabiliste</s0>
<s5>26</s5>
</fC03>
<fC03 i1="12" i2="X" l="ENG"><s0>Probabilistic approach</s0>
<s5>26</s5>
</fC03>
<fC03 i1="12" i2="X" l="SPA"><s0>Enfoque probabilista</s0>
<s5>26</s5>
</fC03>
<fC03 i1="13" i2="X" l="FRE"><s0>Espace Hilbert</s0>
<s5>27</s5>
</fC03>
<fC03 i1="13" i2="X" l="ENG"><s0>Hilbert space</s0>
<s5>27</s5>
</fC03>
<fC03 i1="13" i2="X" l="SPA"><s0>Espacio Hilbert</s0>
<s5>27</s5>
</fC03>
<fC03 i1="14" i2="X" l="FRE"><s0>Polynôme orthogonal</s0>
<s5>28</s5>
</fC03>
<fC03 i1="14" i2="X" l="ENG"><s0>Orthogonal polynomial</s0>
<s5>28</s5>
</fC03>
<fC03 i1="14" i2="X" l="SPA"><s0>Polinomio ortogonal</s0>
<s5>28</s5>
</fC03>
<fC03 i1="15" i2="X" l="FRE"><s0>Méthode Galerkin</s0>
<s5>29</s5>
</fC03>
<fC03 i1="15" i2="X" l="ENG"><s0>Galerkin method</s0>
<s5>29</s5>
</fC03>
<fC03 i1="15" i2="X" l="SPA"><s0>Método Galerkin</s0>
<s5>29</s5>
</fC03>
<fC03 i1="16" i2="X" l="FRE"><s0>Variable aléatoire</s0>
<s5>30</s5>
</fC03>
<fC03 i1="16" i2="X" l="ENG"><s0>Random variable</s0>
<s5>30</s5>
</fC03>
<fC03 i1="16" i2="X" l="SPA"><s0>Variable aléatoria</s0>
<s5>30</s5>
</fC03>
<fC03 i1="17" i2="X" l="FRE"><s0>Méthode Monte Carlo</s0>
<s5>31</s5>
</fC03>
<fC03 i1="17" i2="X" l="ENG"><s0>Monte Carlo method</s0>
<s5>31</s5>
</fC03>
<fC03 i1="17" i2="X" l="SPA"><s0>Método Monte Carlo</s0>
<s5>31</s5>
</fC03>
<fC03 i1="18" i2="X" l="FRE"><s0>Méthode perturbation</s0>
<s5>32</s5>
</fC03>
<fC03 i1="18" i2="X" l="ENG"><s0>Perturbation method</s0>
<s5>32</s5>
</fC03>
<fC03 i1="18" i2="X" l="SPA"><s0>Método perturbación</s0>
<s5>32</s5>
</fC03>
<fN21><s1>093</s1>
</fN21>
<fN44 i1="01"><s1>OTO</s1>
</fN44>
<fN82><s1>OTO</s1>
</fN82>
</pA>
</standard>
<server><NO>PASCAL 06-0156613 INIST</NO>
<ET>Stochastic analysis of interconnect performance in the presence of process variations</ET>
<AU>WANG (Janet); GHANTA (Praveen); VRUDHULA (Sarma)</AU>
<AF>ECE Dept., Univ. of Arizona/Tucson, Arizona/Etats-Unis (1 aut., 2 aut., 3 aut.)</AF>
<DT>Congrès; Niveau analytique</DT>
<SO>IEEE/ACM International Conference on Computer-Aided Design/2004-11-07/San Jose CA USA; Etats-Unis; Piscataway, N.J., New-York, N.Y.: IEEE; Da. 2004; vol2, 880-886; ISBN 0-7803-8702-3</SO>
<LA>Anglais</LA>
<EA>Deformations in interconnect due to process variations can lead to significant performance degradation in deep sub-micron circuits. Timing analyzers attempt to capture the effects of variation on delay with simplified models. The timing verification of RC or RLC networks requires the substitution of such simplified models with spatial stochastic processes that capture the random nature of process variations. The present work proposes a new and viable method to compute the stochastic response of interconnects. The technique models the stochastic response in an infinite dimensional Hilbert space in terms of orthogonal polynomial expansions. A finite representation is obtained by using the Galerkin approach of minimizing the Hilbert space norm of the residual error. The key advance of the proposed method is that it provides a functional representation of the response of the system in terms of the random variables that represent the process variations. The proposed algorithm has been implemented in a procedure called OPERA. Results from OPERA simulations on commercial design test cases match well with those from the classical Monte Carlo SPICE simulations and from perturbation methods. Additionally OPERA shows good computational efficiency: speedup factor of 60 has been observed over Monte Carlo SPICE simulations.</EA>
<CC>001D02B11; 001D03F06B</CC>
<FD>Conception assistée; Conception circuit; Processus stochastique; Analyse stochastique; Evaluation performance; Système temporisé; Effet retard; Appel procédure; Analyse statistique; Modélisation; Méthode stochastique; Approche probabiliste; Espace Hilbert; Polynôme orthogonal; Méthode Galerkin; Variable aléatoire; Méthode Monte Carlo; Méthode perturbation</FD>
<ED>Computer aided design; Circuit design; Stochastic process; Stochastic analysis; Performance evaluation; Timed system; Delay effect; Procedure call; Statistical analysis; Modeling; Stochastic method; Probabilistic approach; Hilbert space; Orthogonal polynomial; Galerkin method; Random variable; Monte Carlo method; Perturbation method</ED>
<SD>Concepción asistida; Diseño circuito; Proceso estocástico; Análisis estocástico; Evaluación prestación; Sistema temporizado; Efecto retardo; Llamada procedimiento; Análisis estadístico; Modelización; Método estocástico; Enfoque probabilista; Espacio Hilbert; Polinomio ortogonal; Método Galerkin; Variable aléatoria; Método Monte Carlo; Método perturbación</SD>
<LO>INIST-Y 38705.354000138704991270</LO>
<ID>06-0156613</ID>
</server>
</inist>
</record>
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